1 Introduction

The multilevel inverter topologies are known for high-power applications due to their advantages such as reduced CMV, minimized output harmonics in voltage and current, lower switching losses, reduced EMI problems and reduced voltage stresses across the switches. The multiphase system plays an important role in various applications such as marine propulsion, hybrid electric vehicles and electric traction due to its reduced torque ripple, improved fault tolerance and higher torque density. Multilevel inverters are used for multipurpose uses such as active filter, static VAR compensator and large motor drives. When the numbers of levels are increased, number of switching devices will be increased, making the inverter more complex and expensive. Therefore, it is necessary to limit the number of levels and simultaneously explore the advantages of multilevel inverter. Therefore, the three-level inverter can be used to obtain the advantages and also to limit the drawbacks of the multilevel inverter. Among the various multilevel inverter topologies, the three-level neutral-point clamped (NPC) inverter has multiple advantages such as voltage stress reduction, a single DC source effectively shared by three phases, capacitor voltage balance and lower losses.

The CMV is one of the main problems in an inverter. It causes the flow of bearing current in the motor which leads to damage the bearings and shortens the life of the motor. Furthermore, CMV can also be the cause of increase in EMI problems. Therefore, it is very important to eliminate the CMV in NPC inverters. Numerous solutions have been proposed to address the minimization of the CMV level such as the use of filter circuits, multicarrier sinusoidal pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) techniques [1,2,3,4,5,6,7]. The SVPWM is a widely used method among various multilevel inverter modulation techniques which improves inverter performance in context of maximum DC link utilization, lower phase current and voltage harmonics, lower CMV, etc. Several strategies are reported to reduce/eliminate the CMV in induction motor drives [8,9,10,11,12,13]. In [8], optimized switching PWM method is reported to minimize the CMV in an open-end five-phase induction motor (FP-IM). In [9], the common mode choke and EMI filters are designed to reduce the CMV in induction motor drive. The reduction of CMV for five-level active NPC inverters by the space vector modulation technique is proposed in [10] which decreases the peak value of the CMV to one-twelfth of the DC link voltage. In [11], the zero CMV switching states are selected in three-level SVPWM to eliminate the CMV in FP-IM drive. In order to eliminate the CMV, the sample-averaged common mode current elimination PWM technique in conjunction with decoupled PWM is presented in case of five-phase open-end winding induction motor [12]. A three-dimensional space vector modulation strategy is presented to reduce CMV for multilevel inverter in [13].

Recently, several techniques are presented to reduce the CMV in two-level five-phase inverter (2LFPI) [14]-[16]. In [14], PWM techniques are investigated including near-state and remote-state to reduce the CMV. Various sigma-delta modulation schemes are reported in [15] to minimize the CMV. A scalar PWM method is reported in [16] for the reduction of CMV by keeping zero averaged CMV within a switching period. It is observed in [14, 16] that 2LFPI can only reduce the CMV because it has limited VV of 32 which generate the CMV other than zero. In motor drive application, with the use of 2LFPI, the current ripple will be increased which increases the torque ripple. A SVPWM method is presented in 3LFPI to minimize the CMV with the use of 116 switching states which are located in 10 sectors which are further divided into 110 triangles that makes the method complex [17]. Various PWMs and SVPWMs strategies are studied in [18] to analyze the CMV spectrum. A DTC technique is investigated in case of 3LFPI fed FP-IM for CMV elimination with the help of zero CMV VV [19]. In [20], PWM and SVM techniques are presented, wherein it is found that the SVM technique with 31 VV is better pertaining to CMV elimination. In [21], the CMV elimination is achieved by using only six switching states of matrix converter in speed sensorless induction motor drive which is controlled by multiple objective finite set model predictive control technique. In [22], 2LFPI is compared with 3LFPI based on CMV status and it is observed that by using 3LFPI, the CMV can be eliminated.

For high-power applications such as electric vehicle [23], aircrafts [24], locomotive traction [25], ship propulsion and cranes [26,27,28], the multiphase machines are preferred. To drive the multiphase machines, the multilevel inverter can be preferred to enhance the advantages, such as higher degree of freedom in selecting accurate VV, lower current harmonics, lower per phase rating and lower per switch stress. In [23], a fault-tolerant SVPWM-direct torque control (DTC) method is presented for five-phase fault-tolerant fractional slot concentrated-winding interior-permanent-magnet motor to achieve the performance indices as lower torque ripple, fast dynamic response, lower current harmonics and easy and fast realization in electric vehicle.

In [29], the SVPWM-based scheme is implemented for five-phase open-end load fed from dual matrix converter. This method reduces the current harmonics in the machine. In [30], space vector modulation is implemented for the operation of 3LFPI with the use of dual-voltage inverter system. In [29] and [30], the control algorithm implementation is carried out for open-end load which is always complex as compared to single side load. Two model predictive current control methods are presented for two-level five-phase inverter (2LFPI) in [31], wherein each of these techniques reduces the CMV by 90%. It is seen that with the use of 2LFPI, the CMV can only be reduced. The 2LFPI can generate 32 VV, which limit the possibility of selecting accurate VV as compared to 3LFPI which offers 243 VVs. In motor drive application, 2LFPI produces more current harmonics as compared to 3LFPI. In [32], FP-IM fed by 3LFPI is controlled with the help of DTC method, wherein 81 VVs are employed to reduce torque ripple. This control algorithm becomes complex in selecting accurate VV among 81 VVs. The 3LFPI is investigated for the implementation of finite control-set model predictive control in order to obtain superior steady-state performance and fast dynamic response, wherein 114 VVs are utilized which makes the method complex to implement [33]. In [32] and [33], 81 and 114 VVs are utilized consisting of large, medium, small, and zero to trigger 3LFPI. Since DC bus length of medium, small and zero VV is lesser as compared to large VV, use of these VV reduces the DC link utilization.

Recently, various PWM techniques are introduced to eliminate/reduced CMV in five-phase inverter [34,35,36,37,38]. In [34], the CMV is eliminated in 3LFPI with the help of model predictive control method; however, the control algorithm is complex due to increase computational burden and closed loop switching scheme. A three-dimensional PWM technique is proposed in [35] to reduce the CMV at the cost of increase complexity in voltage vector selection through ten triangular prisms and each prism is divided into six hexahedrons. A CMV reduction strategy is implemented for open-winding five-phase drive fed by two five-phase inverters in [36] and [37]; however, involvement of two inverters enhances hardware as well as software burdens. A DTC strategy is implemented in [38] for the five-phase inverter fed FP-IM to eliminate the CMV; however, the scheme is complex due to closed loop switching mechanism and implementation of two look-up tables. In [29,30,31,32,33,34,35,36,37,38], the CMV elimination/reduction is achieved at the cost of increase in complexity in software and hardware implementation.

The CMV causes the flow of bearing currents in induction motors and generates electromagnetic EMI problems. The excess flow of bearing currents may damage the bearing parts of the machine. Therefore, in order to operate the induction motor drive safely, the CMV needs to be eliminated. In this paper, in order to eliminate the CMV, two SVPWM methods are proposed. For both the software and hardware implementations, these methods are simple due to the open loop switching mechanism, selection of only 31 VV and no look-up table requirement. In order to eliminate the CMV, the 3LFPI is investigated. The selection of 3LFPI is based on the availability of zero CMV VV. The 31 non-vertex VVs are selected which have the zero CMV switching states. The VVs are selected through SVPWM method. Based on selection of different available VVs, two different methods are proposed. In first method, large and a zero VVs are selected in order to give maximum possible DC link utilization along with CMV elimination. However, the maximum DC link utilization is obtained at the expense of increase in phase current distortions. In second method, large, small and zero VVs are selected in order to obtain lesser distortions in phase current along with CMV elimination. However, the phase current distortions are reduced at the expense of reduction in DC link utilization. Since in method 1, only 21 VVs through two transitions and in method 2 only 31 VV through three transitions are used, the proposed SVPWM methods are simple to implement. Both the methods 1 and 2 give the fast dynamic response and do not generate excessive torque ripple. Out of these two methods, method 2 is more advantageous. Both the methods are presented with simulation and experimental results. Method 2 possess following novelties.

  • CMV elimination

  • Lower current harmonics

  • Simple control algorithm

  • Fast dynamic response

  • Control torque ripple

2 Three-level five-phase inverter

The three-level neutral-point clamped (NPC) inverter is widely used in the application of motor drive. A k level NPC inverter contains (k − 1) capacitors on DC bus link, 2(k − 1) power switching devices per phase and 2(k − 2) variable clamping diodes per phase. Figure 1 shows the schematic of three-level five-phase inverter. The capacitors used in inverter are C1 and C2, which divide the DC bus voltage into three levels, via + Vdc/2, − Vdc/2 and 0Vdc. The switch function of the inverter is given as S = [SA SB SC SD SE]T, where Si = 2 or 0 or 1 which represent the turning ‘ON’ of upper two or lower two or middle two switches giving the pole voltages as Vdc/2, − Vdc/2 and 0Vdc, respectively. Table 1 gives the pole voltages according to switch functions for phase ‘A’. The switching states of NPC inverter depend on nm, where n-number of levels and m-number of phases. Therefore, there are 35 = 243 switching states available in 3LFPI [39, 40].

Fig. 1
figure 1

3LFPI fed FP-IM

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Table 1 Switching states of three-level inverter
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The 3LFPI offers the features such as there is no any dynamic voltage sharing problem, each of the switches in the NPC inverter withstands only half of the total DC voltage during interchange, the phase voltages have less total harmonic distortions (THD) as compared to two-level inverter operating at the same voltage rating and device switching frequency. The 3LFPI has two planes which are orthogonal to each other. The d-q plane lies at 10n ± 1 & x–y at 10n ± 3. The fundamental supply component plus supply harmonics of the order 10n ± 1 (n = 0, 1, 2, 3,...) are mapped into the d-q space plane, and the supply harmonics of the order 10n ± 3 (n = 0, 1, 2, 3,...) are mapped into the x–y space plane. Hence, it could be deduced that the auxiliary vector space represents a distortion voltage system producing 3rd order harmonics, embedded in the fundamental system. Hence, the x–y vector space voltages represent a distortion voltage that generates x–y components. It is generally desired to eliminate the x–y voltage distortion by making the x–y voltage vector null, resulting in sinusoidal voltages hence a sinusoidal air-gap flux pattern in the induction machine. The d-q and x–y voltages can be represented in phase voltages form as (θ = 2π/5°)

$$ \left[ {\begin{array}{*{20}c} {v_{d} } \\ {v_{q} } \\ {v_{x} } \\ {v_{y} } \\ {v_{z} } \\ \end{array} } \right] = \frac{2}{5}\left[ {\begin{array}{*{20}c} 1 & {\cos \theta } & {\cos 2\theta } & {\cos 3\theta } & {\cos 4\theta } \\ 0 & {\sin \theta } & {\sin 2\theta } & {\sin 3\theta } & {\sin 4\theta } \\ 1 & {\cos 2\theta } & {\cos 4\theta } & {\cos \theta } & {\cos 3\theta } \\ 0 & {\sin 2\theta } & {\sin 4\theta } & {\sin \theta } & {\sin 3\theta } \\ {1/2} & {1/2} & {1/2} & {1/2} & {1/2} \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V_{AN} } \\ {V_{BN} } \\ {V_{CN} } \\ {V_{DN} } \\ {V_{EN} } \\ \end{array} } \right] $$
(1)

The symmetrical five-phase physical quantities through this transformation matrix can be projected to two orthogonal subspaces d-q and x–y. Phase voltages space vectors are defined in d-q stationary reference frame as

$$ {\text{V}}_{{{\text{d}} - {\text{q}}}} = \frac{2}{5}\left( {{\text{V}}_{{\text{A}}} + {\text{aV}}_{{\text{B}}} + {\text{a}}^{2} {\text{V}}_{{\text{C}}} + {\text{a}}^{3} {\text{V}}_{{\text{D}}} + {\text{a}}^{4} {\text{V}}_{{\text{E}}} } \right) $$
(2)
$$ V_{ref} = \sqrt {V_{d}^{2} + V_{q}^{2} } $$
(3)

The x–y vector space plane is similar to the d-q plane, but the d-q plane follows ABCDE phase order and since the third-order harmonic components are mapped in x–y space plane with the order 10n ± 3, x–y plane follows ACEBD phase order system. Therefore, the phase voltage space vectors are defined in x–y stationary reference frame as [41]

$$ V_{x - y} = \frac{2}{5}\left( {V_{A} + aV_{C} + a^{3} V_{E} + a^{3} V_{B} + a^{4} V_{D} } \right) $$
(4)

where \( a = e^{j2\pi /3}\)

$$ V_{dref} = V_{ref} \cos \left( \theta \right) $$
(5)
$$ V_{qref} = V_{ref} \sin \left( \theta \right) $$
(6)
$$ V_{xref} = 0 $$
(7)
$$ V_{yref} = 0 $$
(8)
$$ T_{1} = \left| {\frac{{V_{ref} }}{{V_{1} }}} \right|T_{s} , T_{2} = \left| {\frac{{V_{ref} }}{{V_{2} }}} \right|T_{s} {\text{and}} T_{0} = T_{s} - \left( {T_{1} + T_{2} } \right) $$
(9)

where \(T_{0}\), \(T_{1}\)and \(T_{2}\) are specified times for a given voltage vector.

Out of 243 available VVs, 31 non-vertex VVs are selected in the proposed methods based on their capability of eliminating the CMV. There are two methods presented, both eliminate the CMV. The VVs are mapped in d-q and x–y space plane as shown in Fig. 2a and b, respectively. The VVs which are on the same line in d-q space plane lie opposite to each other in x–y space plane as shown in Fig. 3a and b. For example, the voltage vector with switching state 22,001 and 21,101 lie on same side in d-q plane, whereas these switching states lie opposite to each other in x–y plane. The opposite VV cancel each other and hence by eliminating x–y stator plane the phase current distortions can be eliminated.

Fig. 2
figure 2

Mapping of VV: a non-vertex and b vertex

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Fig. 3
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mapping of non-vertex VV: a d-q plane and b x–y plane

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3 CMV elimination

The CMV is represented as

$$ {\text{CMV}} = \frac{{V_{a} + V_{b} + V_{c} + V_{d} + V_{e} }}{5} $$
(10)

where \(V_{a} ,V_{b} ,V_{c} ,V_{d} \& V_{e}\) is the pole voltages of the inverter. Consider switching state 22,001, a phase pole voltage is \(+ \frac{{V_{dc} }}{2}\), b phase pole voltage is \(+ \frac{{V_{dc} }}{2}\), for c, d and e phase, pole voltages are \(- \frac{{V_{dc} }}{2}\), \(- \frac{{V_{dc} }}{2}\) and \(0 V_{dc}\). Therefore, the CMV is \(0 V_{dc}\) as given by (10). The CMV for remaining non-vertex vectors of sector-1 is given in Table 2. In Table 2, the CMV for vertex VV is also given. These vertex VVs lie in between non-vertex VVs [23]. By using these vertex vectors, CMV will be coming out as \(\pm \frac{{V_{dc} }}{2}\). Vertex vectors along with two zero VV cannot eliminate the CMV, because their switching states generate CMV. Consider switching state 22,002, a phase pole voltage is \(+ \frac{{V_{dc} }}{2}\), b phase pole voltage is \(+ \frac{{V_{dc} }}{2}\), for c, d and e phase pole voltages are \(- \frac{{V_{dc} }}{2}\), \(- \frac{{V_{dc} }}{2}\) and \(+ \frac{{V_{dc} }}{2}\). Therefore, the CMV is \( + \frac{{V_{dc} }}{10}\) as given by (10).

Table 2 CMV of non-vertex and vertex vectors of sector-1
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In order to eliminate CMV, two different methods are presented. In first method, non-vertex large and zero VVs are selected to get CMV elimination and maximum DC link. In this method, sector-1 is considered from -180 to 180. Two non-vertex large VVs and a zero voltage vector are selected in each sector. In second method, non-vertex large, small and zero VVs are selected to get CMV elimination and x–y stator pane elimination. In this method, sector-1 is considered from 00 to 360. A large, two small and a zero voltage vectors are selected in each sector. The selection and transition of VV along with their CMV output for all sectors are given in Table 3. Table 4 is provided to compare the proposed method 2 with the existing techniques. It shows the benefits and disadvantages of proposed method 2 as compared to other existing techniques in context of RMS value of CMV, current THD, DC link utilization, algorithm implementation, etc.

Table 3 CMV and VV transition in method 1 and 2
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Table 4 Comparison of different PWM methods [11, 17, 19, 35, 38] with proposed method 2
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The dwell times for method 1 can be calculated as follows:

Voltage second balance equation:

$$ V_{1} T_{1} + V_{2} T_{2} + V_{0} T_{0} = V_{ref} T_{s} $$
(11)
$$ T_{0} = T_{s} - 1.618T_{s} M\cos \theta $$
(12)
$$ T_{1} = 0.309T_{s} M\cos \theta - 0.951T_{s} \sin \theta $$
(13)
$$ T_{2} = 0.309T_{s} M\cos \theta + 0.951T_{s} \sin \theta $$
(14)

where M-modulation index, Ts-sampling time, V1, V2 and V0 are large and zero VV.

The dwell times for method 2 can be calculated as follows:

Voltage second balance equation:

$$ V_{1} T_{1} + V_{11} T_{2} + V_{21} T_{3} + V_{0} T_{0} = V_{ref} T_{s} $$
(15)
$$ T_{0} = T_{s} - 0.382M\cos \theta $$
(16)
$$ T_{1} = 0.382T_{s} M\cos \theta - 0.612T_{s} \sin \theta $$
(17)
$$ T_{2} = 0.5T_{s} M\cos \theta - 0.612T_{s} \sin \theta $$
(18)
$$ T_{3} = 0.382T_{s} M\cos \theta + 0.612T_{s} \sin \theta $$
(19)

where, V1, V11, V21 and V0 are large, small, small and zero VV.

4 Simulation results

The simulation results of the proposed methods are taken with the help of MATLAB software. Table 5 shows the parameters of the proposed methods. The proposed SVPWM methods are simulated for the 3LFPI fed FP-IMload. Figures 4 and 5 represent the results for method 1 and 2, respectively, for the no load operation at the speed of 1350 rpm for modulation index (MI) of 0.9. Figures 4a and 5a give the results of the CMV which has almost zero magnitude. Hence, it is seen that the proposed methods have successfully implemented through simulation. Figures 4b and 5b depict the results of the phase current. Figure 4b shows the distortions in the phase current due to appearance of the third harmonic x–y phase current components. These distortions are eliminated in method 2 by removing x–y phase current components. The results of CMV and phase current are taken for the MI of 0.7 in Figs. 6 and 7 under the loading operation of half of the rated at rated speed of 1500 rpm. In method 1 since only large and a zero VV are selected, the x–y stator plane is not eliminated. It is seen that the current is significantly distorted in method 1. This drawback is overcome in method 2 by implementing x–y stator plane elimination. Accordingly, x–y plane is eliminated and hence, the phase current becomes sinusoidal. The results show that the CMV is eliminated in both the methods.

Table 5 Parameters of the drive
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Fig. 4
figure 4

Simulation results of method 1: a CMV and b phase current at MI of 0.9

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Fig. 5
figure 5

Simulation results of method 2: a CMV and b phase current at MI of 0.9

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Fig. 6
figure 6

Simulation results of method 1: a CMV and b phase current at MI of 0.7

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Fig. 7
figure 7

Simulation results of method 2: a CMV and b phase current at MI of 0.7

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5 Experimental results

The experimental set-up consists of FP-IM connected to DC machine, 3LFPI, digital storage oscilloscope and digital signal processor (DSP) as shown in Fig. 8. The DC machine is used to load FP-IM. The 3LFPI is made of super-fast insulated gate bipolar transistors SKM 50GB063D modules with FRED DSEI 2 × 30 as clamping diodes. The floating point DSP TMSF28379D is used to build the proposed SVPWM methods. The C-programming along with assembly language is used to develop syntax for the proposed SVPWM methods. The DC voltage applied is 200. The programs for methods 1 and 2 are built in computer programming. The machine and inverter parameters are taken from Table 4. The control signals are given through TMSF28379D at sampling frequency of 5 kHz. The experimentation is carried for the proposed methods 1 and 2. Various results of CMV and phase currents are presented which clarify the effective implementation of methods 1 and 2.

Fig. 8
figure 8

Experimental set-up of the proposed methods

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Figure 9 shows the experimental results for method presented in [38] for no load operation at the rotor speed of 1300 rpm. The CMV is almost eliminated in this method as shown in Fig. 9a. The current waveform is depicted in Fig. 9b with its THD and is shown in Fig. 9c. Figure 9d shows the stator flux trajectory. The DC link utilization is lower as observed in Fig. 9e because of the deployment of intermediate large, medium and small voltage vectors. The RMS value of CMV for the complete operation can be seen in Fig. 9f. Figures 10 and 11 show, respectively, the results for methods 1 and 2 of CMV, phase current, THD of phase current, d-q and x–y stator flux trajectories, DC link utilization and rms value of CMV at MI of 0.9 for no load operation at the rotor speed of 1300 rpm. It is seen in Figs. 10 a and 11a that in both the methods, the CMV is coming out as approximately equal to 10 V which is almost negligible as compared to input voltage of 400 Vdc. In method 1, the phase current is highly distorted as shown in Fig. 10b, c as compared to Figs. 9 b, c and 11b, c. It is observed that the current is distorted due to the appearance of x–y stator flux as shown in Fig. 10d as compared to Figs. 9d and 11d. The x–y stator flux generates distortions in phase current in method 1 due to the utilization of only large and zero VV. In [38] and method 2, the magnitude of x–y stator flux is almost negligible due to which the phase current obtained is less distorted. In method 2, large, small and zero VVs are utilized which are applied in such a way that the x–y stator flux is eliminated. Figures 10d and 11d show the d-q, x–y stator flux trajectories for methods 1 and 2, respectively. It is seen that the d-q stator flux trajectories are circular in shape following the steady-state condition by maintaining the rated stator flux in [38] and in both the methods. The DC link utilization in method 1 is better as compared to [38] and method 2 due to utilization of large VV as observed in Fig. 10e as compared to Figs. 9e and 11e. The DC link utilization in method 1 is increased at the expense of distorted phase current. The rms value of CMV in [38] and in both the proposed methods is approximately equal to 8 to 9 V as can be seen in Figs. 9f, 10f and 11f.

Fig. 9
figure 9

Experimental results of method [38]: a CMV (10 V/div., 10 ms/div.), b phase current (0.5A/div., 10 ms/div.), c THD of phase current, d d-q and x–y stator flux, e DC link utilization and f CMV (RMS)

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Fig. 10
figure 10

Experimental results of method 1 at MI of 0.9: a CMV (10 V/div., 10 ms/div.), b Current (0.5A/div., 10 ms/div.), c THD of Current, d d-q and x–y stator flux, e DC link utilization and f CMV

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Fig. 11
figure 11

Experimental results of method 2 at MI of 0.9: a CMV (10 V/div., 10 ms/div.), b Current (0.5A/div., 10 ms/div.), c THD of Current, d d-q and x–y stator flux, e DC link utilization and f CMV

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Figures 12 and 13 show the waveforms of CMV and phase current during loading operation of half of the rated at the rotor speed of 700 rpm at MI of 0.8. It is observed that the CMV is almost eliminated in both the methods. The spikes are observed due to the switching operation and EMI effect. The method 1 gives maximum DC link utilization due to selection of large VV which tends to generate the x–y stator flux. Figures 14 and 15 show results of methods 1 and 2 for the dynamic operation of application of load at rotor speed of 1000 rpm. It is seen that the drive system responded to the application of load of 2 Nm in both the methods. The torque of the machine is increased as the load is applied and the corresponding rotor speed has been reduced due to the open loop switching mechanism. Table 6 gives the comparison between the two methods based on rms value of CMV, DC link utilization and current THD for various operating speed conditions. It is seen that both the methods have almost eliminated the CMV. It is also observed that method 2 achieves lesser phase current THD at the expense of reduced DC link utilization.

Fig. 12
figure 12

Experimental results of method 1 at MI of 0.8: a CMV (10 V/div., 1 ms/div.) and b phase current (1A/div., 20 ms/div.)

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Fig. 13
figure 13

Experimental results of method 2 at MI of 0.8: a CMV (10 V/div., 1 ms/div.) and b phase current (1A/div., 20 ms/div.)

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Fig. 14
figure 14

Experimental results at load condition of method 1: a electromagnetic torque and b speed

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Fig. 15
figure 15

Experimental results at load condition of method 2: a electromagnetic torque and b speed

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Table 6 Comparison between methods [19, 38], proposed 1 and 2
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6 Conclusion

The CMV causes the flow of leakage current in the bearing parts of the machine; in turn, the drive may be damaged. In order to overcome this problem, the CMV should be eliminated. In this paper, two SVPWM methods are proposed to eliminate the CMV. It is seen that both the methods have almost eliminated the CMV. It is observed that in first method, the DC link utilization is increased by 10.63% as compared to method 2 and 26.47% as compared to [38]. It is also observed that in method 2, the phase current THD is reduced by 73% as compared to method 1 and 12.26% as compared to [38]. It is seen that both the methods have reasonably fast dynamic response. All the methods are tested with FP-IM in various operating steady state and transient conditions. The simulation and experimental results have clarified that the proposed SVPWM techniques follow the dynamics of the machine, while achieving the CMV elimination. Both the methods are simple to implement because of the utilization of only 21 VV in method 1 and 31 VV in method 2 among available 243 VV. Therefore, it can be concluded from the theoretical analysis and various simulation and experimental results that all the presented methods have eliminated the CMV; however, method 2 is advantageous as compared to [38] and method 1 with respect to lower current distortions. Method 2 can be further extended to multilevel inverter which will provide better performance to multiphase machines. Method 2 can also be extended to the open-end winding multiphase machines fed by two multiphase inverters. Method 2 can also be used along with the closed-loop control methodologies such as DTC and predictive torque control.